Convolutional Neural Networks (CNNs) and Transformers have achieved remarkable performance in detection and classification tasks. Nevertheless, their feature extraction cannot consider both local and global information, so the detection and classification performance can be further improved. In addition, more and more deep learning networks are designed as more and more complex, and the amount of computation and storage space required is also significantly increased. This paper proposes a combination of CNN and transformer, and designs a local feature enhancement module and global context modeling module to enhance the cascade network. While the local feature enhancement module increases the range of feature extraction, the global context modeling is used to capture the feature maps' global information. To decrease the model complexity, a shared sublayer is designed to realize the sharing of weight parameters between the adjacent convolutional layers or cross convolutional layers, thereby reducing the number of convolutional weight parameters. Moreover, to effectively improve the detection performance of neural networks without increasing network parameters, the optimal transport assignment approach is proposed to resolve the problem of label assignment. The classification loss and regression loss are the summations of the cost between the demander and supplier. The experiment results demonstrate that the proposed Combination of CNN and Transformer with Shared Sublayer (CCTSS) performs better than the state-of-the-art methods in various datasets and applications.

We consider a communication system in which a transmitter is connected to a receiver through parallel channels, and the Go-Back-N ARQ scheme is used to handle transmission errors. A packet error on one channel results in retransmission of packets assigned to other channels under the Go-Back-N ARQ scheme. Therefore, the channel-grouping (a grouped-channel is used to transmit the same packet at a time), would affect the throughput performance. We analyze the throughput performance, and give a tree-algorithm to efficiently search for the optimal channel-grouping which makes the throughput to become maximum. Numerical results show that the throughput is largely improved by using the optimal channel-grouping.

Recently, the throughput performances of ARQ's have been analyzed over a Markov error channel. It has been shown that given a round-trip-delay, the throughput of the Stop-and-Wait ARQ is dependent only on the overall average packet-error probability. In this paper, we exactly analyze the Stop-and-Wait ARQ scheme under the condition that the channel is slotted and packet errors occur according to a two-state Markov chain which is characterized by the decay factor. The distribution of packet delay time and the channel usage factor are obtained. From the analytical results and numerical examples, it is shown that for a given round-trip-delay, the average packet delay time and the channel utilization factor depend on both the overall average packet-error probability and the decay factor characterizing the two-state Markov chain. Furthermore, the decay factor gives different influence on the average delay time and the channel usage factor depending on whether the round-trip-delay is even slots or not.

This paper studies the performance of a dialogue communication system which consists of two stations over a half-duplex line. When a station seizes the right to send its packets, it can consecutively transmits k packets. We analyze the transmission time of a message and the throughput performances of Stop-and-Wait, Go-back-N and Selective-Repeat protocols for the half-duplex line transmission system. Based on the analytical and numerical results, we clarify the influences of the switching and the thinking times, which exist in half-duplex line system, on the throughput performance, and give the optimal k which makes the throughput to become maximum. It is observed that the throughput performances are greatly influenced not only by the switching and thinking times but also by the average message length.

Since the structured quasi-cyclic low-density parity-check (QC-LDPC) codes for most modern wireless communication systems include multiple code rates, various block lengths, and the corresponding different sizes of submatrices in parity check matrix (PCM), the reconfigurable LDPC decoder is desirable and the permutation network is needed to accommodate any input number (IN) and shift number (SN) for cyclic shift. In this paper, we propose a novel permutation network architecture for the reconfigurable QC-LDPC decoders based on Banyan network. We prove that Banyan network has the nonblocking property for cyclic shift when the IN is power of 2, and give the control signal generating algorithm. Through introducing the bypass network, we put forward the nonblocking scheme for any IN and SN. In addition, we present the hardware design of the control signal generator, which can greatly reduce the hardware complexity and latency. The synthesis results using the TSMC 0.18 µm library demonstrate that the proposed permutation network can be implemented with the area of 0.546 mm2 and the frequency of 292 MHz.

Multi-agent based simulation has been widely used in behavior finance, and several single-processed simulation platforms with Agent-Based Modeling (ABM) have been proposed. However, traditional simulations of stock markets on single processed computers are limited by the computing capability since financial researchers need larger and larger number of agents and more and more rounds to evolve agents' intelligence and get more efficient data. This paper introduces a distributed multi-agent simulation platform, named PSSPAM, for stock market simulation focusing on large scale of parallel agents, communication system and simulation scheduling. A logical architecture for distributed artificial stock market simulation is proposed, containing four loosely coupled modules: agent module, market module, communication system and user interface. With the customizable trading strategies inside, agents are deployed to multiple computing nodes. Agents exchange messages with each other and with the market based on a customizable network topology through a uniform communication system. With a large number of agent threads, the round scheduling strategy is used during the simulation, and a worker pool is applied in the market module. Financial researchers can design their own financial models and run the simulation through the user interface, without caring about the complexity of parallelization and related problems. Two groups of experiments are conducted, one with internal communication between agents and the other without communication between agents, to verify PSSPAM to be compatible with the data from Euronext-NYSE. And the platform shows fair scalability and performance under different parallelism configurations.

In this paper, we investigate the throughput efficiency of the Go-Back-N ARQ protocol on parallel multiple channels with burst errors. We assume that packet errors occur according to a two-state Markov chain on each channel. The effect of the decay factor of the Markov chain on throughput efficiency is evaluated based on the results of numerical analysis.

Automated bug localization is an important issue in software engineering. In the last few decades, various proactive and reactive localization approaches have been proposed to predict the fault-prone software modules. However, most proactive or reactive approaches need source code information or software complexity metrics to perform localization. In this paper, we propose a reactive approach which considers only bug report information and historical revision logs. In our approach, the co-location relationships among bug reports are explored to improve the prediction accuracy of a state-of-the-art learning method. Studies on three open source projects reveal that the proposed scheme can consistently improve the prediction accuracy in all three software projects by nearly 11.6% on average.

ARM chips with low energy consumption and low-cost investment have been rapidly applied to smart office and smart entertainment including cloud mobile phones and cloud games. This paper first summarizes key technologies and development status of the above scenarios including CPU, memory, IO hardware virtualization characteristics, ARM hypervisor and container, GPU virtualization, network virtualization, resource management and remote transmission technologies. Then, in view of the current lack of publicly referenced ARM cloud constructing solutions, this paper proposes and constructs an implementation framework for building an ARM cloud, and successively focuses on the formal definition of virtualization framework, Android container system and resource quota management methods, GPU virtualization based on API remoting and GPU pass-through, and the remote transmission technology. Finally, the experimental results show that the proposed model and corresponding component implementation methods are effective, especially, the pass-through mode for virtualizing GPU resources has higher performance and higher parallelism.

This letter addresses the problem of robust transceiver design for the multiuser multiple-input-multiple-output (MIMO) downlink where the channel state information at the base station (BS) is imperfect. A stochastic approach which minimizes the expectation of the total mean square error (MSE) of the downlink conditioned on the channel estimates under a total transmit power constraint is adopted. The iterative algorithm reported in [2] is improved to handle the proposed robust optimization problem. Simulation results show that our proposed robust scheme effectively reduces the performance loss due to channel uncertainties and outperforms existing methods, especially when the channel errors of the users are different.

In this letter, we discuss the problem of receive antenna selection in the downlink of multiuser multiple-input multiple-output (MIMO) systems with Tomlinson-Harashima precoding (THP), where the number of receivers is assumed equal to that of transmit antennas. Based on the criterion of maximum system sum-capacity, a per-layer receive antenna selection scheme is proposed. This scheme, which selects one receive antenna for each receiver, can well exploit the nonlinear and successive characteristics of THP. Two models are established for the proposed per-layer scheme and the conventional per-user scheme. Both the theoretical analysis and simulation results indicate that the proposed scheme can greatly improve the equivalent channel power gains and the system sum-capacity.

In this letter, we propose an efficient user selection algorithm aiming to select users with less spatially correlation and meet the user number limit of zero-forcing beamforming in downlink multiuser MIMO systems. This algorithm yields a considerable complexity reduction with only a small loss in performance and it only needs partial users' CSI feedback. Coupled with the algorithm, a null space updating method in O(K2) time and a modified proportional fair scheduling algorithm are also proposed.

In this paper, we propose a synthesizable LDPC decoder IP core for the WiMAX system with high parallelism and enhanced error-correcting performance. By taking the advantages of both layered scheduling and fully-parallel architecture, the decoder can fully support multi-mode decoding specified in WiMAX with the parallelism much higher than commonly used partial-parallel layered LDPC decoder architecture. 6-bit quantized messages are split into bit-serial style and 2bit-width serial processing lines work concurrently so that only 3 cycles are required to decode one layer. As a result, 12∼24 cycles are enough to process one iteration for all the code-rates specified in WiMAX. Compared to our previous bit-serial decoder, it doubles the parallelism and solves the message saturation problem of the bit-serial arithmetic, with minor gate count increase. Power synthesis result shows that the proposed decoder achieves 5.83pJ/bit/iteration energy efficiency which is 46.8% improvement compared to state-of-the-art work. Furthermore, an advanced dynamic quantization (ADQ) technique is proposed to enhance the error-correcting performance in layered decoder architecture. With about 2% area overhead, 6-bit ADQ can achieve the error-correcting performance close to 7-bit fixed quantization with improved error floor performance.

In this paper, we used the data set of domain names Global Top 1M provided by Alexa to analyze the effectiveness of Fallback in ECN. For the same test server, we first negotiate a connection with Not-ECN-Capable, and then negotiate a connection with ECN-Capable, if the sender does not receive the response to ECN-Capable negotiation from the receiver by the end of retransmission timeout, it will enter the Fallback state, and switch to negotiating a connection with Not-ECN-Capable. By extracting the header fields of the TCP/IP packets, we confirmed that in most regions, connectivity will be slightly improved after Fallback is enabled and Fallback has a positive effect on the total time of the whole access process. Meanwhile, we provided the updated information about the characteristics related to ECN with Fallback in different regions by considering the geographical region distribution of all targeted servers.

TCP Friendly Rate Control (TFRC) has been widely used in the Internet multimedia streaming applications. However, performance of traditional TFRC algorithm degrades significantly when deployed over wireless networks. Although numerous TFRC variants have been proposed to improve the performance of TFRC over wireless networks, designing a TFRC algorithm with graceful performance both in throughput and fairness still remains a great challenge. In this paper, a novel TFRC algorithm, named TFRC-FIT, is proposed to improve the performance of TFRC over wireless environments. In the proposed approach, the behavior of multiple TFRC flows is simulated in single connection, while the number of simulated flows is adjusted by the network queuing delay. Through this mechanism, TFRC-FIT can fully utilize the capacity of wireless networks, while maintaining good fairness and TCP friendliness. Both theoretical analysis and extensive experiments over hardware network emulator, Planetlab test bed as well as commercial 3G wireless networks are carried out to characterize and validate the performance of our proposed approach.

Permutation network plays an important role in the reconfigurable QC-LDPC decoder for most modern wireless communication systems with multiple code rates and various code lengths. This paper presents the generic permutation network (GPN) for the reconfigurable QC-LDPC decoder. Compared with conventional permutation networks, this proposal could break through the input number restriction, such as power of 2 and other limited number, and optimize the network for any application in demand. Moreover, the proposed scheme could greatly reduce the latency because of less stages and efficient control signal generating algorithm. In addition, the proposed network processes the nature of high parallelism which could enable several groups of data to be cyclically shifted simultaneously. The synthesis results using the 90 nm technology demonstrate that this architecture can be implemented with the gate count of 18.3k for WiMAX standard at the frequency of 600 MHz and 10.9k for WiFi standard at the frequency of 800 MHz.

Structured quasi-cyclic low-density parity-check (QC-LDPC) codes have been adopted in many wireless communication standards, such as WiMAX, Wi-Fi and WPAN. To completely support the variable code rate (multi-rate) and variable code length (multi-length) implementation for universal applications, the partial-parallel layered LDPC decoder architecture is straightforward and widely used in the decoder design. In this paper, we propose a high parallel LDPC decoder architecture for WiMAX system with dedicated ASIC design. Different from the block by block decoding schedule in most partial-parallel layered architectures, all the messages within each layer are updated simultaneously in the proposed fully-parallel layered decoder architecture. Meanwhile, the message updating is separated into bit-serial style to reduce hardware complexity. A 6-bit implementation is adopted in the decoder chip, since simulations demonstrate that 6-bit quantization is the best trade-off between performance and complexity. Moreover, the two-layer concurrent processing technique is proposed to further increase the parallelism for low code rates. Implementation results show that the decoder chip saves 22.2% storage bits and only takes 2448 clock cycles per iteration for all the code rates defined in WiMAX standard. It occupies 3.36 mm2 in SMIC 65 nm CMOS process, and realizes 1056 Mbps throughput at 1.2 V, 110 MHz and 10 iterations with 115 mW power occupation, which infers a power efficiency of 10.9 pJ/bit/iteration. The power efficiency is improved 63.6% in normalized comparison with the state-of-art WiMAX LDPC decoder.

In this paper, we propose an adaptive Go-Back-N (GBN) ARQ protocol over two parallel channels with slow state transition. This proposed protocol sophisticatedly determines the order of priority of the channel usage for sending packets, by using the channel-state feedback information. We exactly analyze the throughput efficiency of the protocol and obtain its closed-form expression under the assumption that the time-varying channel is modeled by a two-state Markov chain, which is characterized by packet error rate and the decay factor. The analytical results and numerical examples show that, for a given round-trip time, the throughput efficiency depends on both the average packet-error rate and the decay factor. Furthermore, it is shown that the throughput efficiency of the proposed protocol is superior to that of the non-adaptive Go-Back-N protocol using the two channels in a fixed order in the case of slow state transition (i.e. the decay factor is positively large).

In high-speed packet networks, protocol processing overhead time becomes remarkable in determining the system performance. In this paper, we present a new Selective-Repeat ARQ scheme (called Block SR-ARQ sheme), in which a packet is transmitted or retransmitted in the same way as basic SR-ARQ scheme, but a single acknowledgement packet is used to acknowledge a block of packets. The maximum number of packets acknowledged by an acknowledgement packet is defined as block size. We analyze the system throughput and the average packet delay over the system, and the accuracy of approximately analyzed results is validated by simulation. Furthermore, we show that there exists an optimal block size which obtains both the maximum throughput and the minimum average packet delay.

In spectrum-sharing systems where the secondary user (SU) opportunistically accesses the primary user (PU)'s licensed channel, the SU should satisfy both the transmit power constraint of the SU transmitter and the received power constraint at the PU receiver. This letter studies the ergodic capacity of spectrum-sharing systems in fading channels. The ergodic capacity expression along with the optimal power allocation scheme is derived considering both the average transmit and received power constraints. The capacity function in terms of the two power constraints is found to be divided into transmit power limited region, received power limited region and dual limited region. Numerical results in Rayleigh fading channels are presented to verify our analysis.